graph TD; A(Main envelope) --> B(Main VCA) A(Main envelope) --> |EOC gate|J(Random 1V/oct) A(Main envelope) --> |EOC gate|K(Random FM modulation) I(VCO) --> B(Main VCA) J(Random 1V/oct) --> I(VCO) K(Random FM modulation) --> I(VCO) E(Random attack modulation) --> A(Main envelope) F(Random decay modulation) --> A(Main envelope) B(Main VCA) --> D(Bandpass filter) G(Random filter modulation) --> D(Bandpass filter) D(Bandpass filter) --> H(Main out)